Red Pitaya has recently introduced new STEMlab product tailored for HF+50MHz SDR & RF applications that requires DAQ systems with higher precision. Improvements were done based on feedback that was received from HAMradio operators & research laboratories have many time modified part of STEMlab front-end so that they were able to connect power amplification units, pre-amplifiers & attenuators, filters, other HAMradio or scientific electronics.
STEMlab 122.88-16 SDR comes with two 16 bit ADCs, 50 ohm inputs & 14 bit DACs 50ohm outputs , three times bigger dual core ARM Cortex A9 + Xilinx Zynq 7020 FPGA, ultra low phase noise 122.88MHz clock and 1Gbit ethernet connectivity. RF inputs are improved in terms of distortions, noise & crosstalk which will significantly improve receive and use of antenna diversity. Bigger FPGA provides more real-time processing capabilities. Clock was changed from 125MHz to 122.88MHz so that it makes new STEMlab more hardware compatible with HPSDR. Good news for current STEMlab users is also that new device has not changed the form factor so it directly replaces current STEMlab platform. STEMlab will come at higher price compared to STEMlab 125-14 version, but price/performance ratio will still be very competitive in comparison with other similar devices on the market. With this improved performances & affordability we believe STEMlab 122.88-16 SDR will enable Red Pitaya community to build SDR transceivers & other scientific devices that will be able to compete with really high-end products on market available today.
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Basic |
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| Processor | Processor DUAL CORE ARMCORTEX A9 |
| FPGA | FPGA Xilinx Zynq 7020 SOC |
| RAM | 512 MB |
| System memory | Micro SD up to 32 GB |
| Power consumption | 1,5 A |
| Connectivity | |
| Ethernet | 1 Gbit |
| USB | USB 2.0 |
| WIFI | Requires WIFI dongle |
| RF inputs | |
| RF input channels | 2 |
| Sample rate | 122.88 Msps |
| ADC resolution | 16 bit |
| Full scale voltage range | 0,5 Vpp /-2 dBm |
|
Input impendance Coupling |
50 ohm AC |
| ADC SFDR (typical for 2nd harmonic) | 89 dBfs |
| ADC SNR (typical) | 76 dBfs |
| Lowest -3dB RF input corner frequency | 300 kHz |
| ADC input analog BW |
550 MHz For use in under-sampling mode (direct RF sampling) |
| RF outputs | |
| Number of RF outputs | 2 |
| DAC sampling rate | 125 |
| Msps DAC width | 14 |
| bits Output impendance | 50 |
| ohm Coupling | AC |
| DAC SFDR @ 10 MHz | 86 dBc |
| DAC SFDR @ 30 MHz | 67 dBc |
| Lowest -3dB RF output corner frequency | 300 kHz |
| Full-scale RF output | 1 Vpp /+4 dBm |
| Clock | |
| Sampling CLK phase noise @ 100 Hz offset | -110 dBc |
| Sampling CLK phase noise @ 1 kHz offset | -140 dBc |
| Sampling CLK phase noise @ 10 kHz offset | -155 dBc |
| Sampling CLK phase noise @ 100 kHz offset | -160 dBc |
| Extension connectors functionality | |
| Digital IOs | 16 |
| Analog inputs | 4 |
| Analog inputs voltage range | 7V |
| Sample rate | 100 kS/s |
| Resolution | 12 bit |
| Analog outputs | 4 |
| Analog outputs voltage range | 0-1,8 V |
| Communication interfaces | I2C, SPI, UART |
| Available voltages | +5 V, + 3,3 V, -4 V |
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